Pragmatic Integration of an SRAM Row Cache in Heterogwnwous 3-D DRAM Architecture Using TSV / Dong Hyuk Woo, NAk Hee Seong, Hsien-Hsin S. Lee
A Low-Complexity Turbo Decorder Architecture for Energy-Efficient Wireless Sensor Networks / Liang Li, et al.
Pipelined Radix-2k Feedforward FFT Architectures / Mario Garrido, et al.
Algorithm and Architecture Design of Bandwitdt-Oriented Motion Estimation for Real-Time Mobile Video Applications / Jui-Hung Hsieh, Tian-Sheuan Chang
STBC-OFDM Downlink Baseband Receiver for Mobile WMAN / Hsiao-Yun Chen, et al.
Glitch-Free NAND-Based Digitally Controlled Delay-Lines / Davide De Caro
A High-Efficiency, Wide Workload Range, Digital Off-Time Modulation (DOTM) DC-DC Converter with Asynchronous Power Saving Technique / Po-Hsiang Lan, Tsung-Ju Yang, Po-Chiun Huang
Formal Verification of Architectural Power Intent / Aritra Hazra, et al.
Statistical SRAM Read Access Yield Improvement Using Negative Capacitance Circuits / Hassan Mostafa, Mohab Anis, Mohamed Elmasry
An Energy-Efficient L2 Cache Architecture Using Way Tag Information Under Write-Through Policy / Jianwei Dai, Lei Wang
An Analytical Latency Model for Networks-on-Chip / Abbas Eslami Kiasari, Zhonghai Lu, Axel Zantsch
Built-In Generation of Functional Broadside Tests Using a Fixed Hardware Structure / Irth Pomeranz
Checkpointing for Virtual Platforms and SystemC-TLM / Marius Monton, Jokob Engblom, Mark Burton
etc.